In modern PCB designs, checking and tuning the trace length of high-speed interface signals such as for DDR4 memories is a time-consuming, but important process. Length matching is performed to control signal timings within allowed limits and avoid timing mismatches. Examples include phase tuning of differential pairs and matched group delay tuning. PCB designers must identify shorter and longer traces in a match group and decide where to compensate the length accordingly. The Cadence® Allegro® TimingVision™ platform colour-coded visualization enables this task to be completed efficiently. Using Auto Interactive routing technology, PCB designers can match trace lengths quickly and easily.
5 THINGS YOU WILL LEARN DURING THIS SESSION:
1. High speed interface timing requirements
2. Timing challenges
3. Phase and Delay Tune
4. Auto colour coding of trace lengths
5. Auto interactive tuning